A New Model for Through-Silicon Vias on 3-D IC Using Conformal Mapping Method

被引：39

作者：

Cheng, Tai-Yu ^{[1
,2
]}

Wang, Chuen-De ^{[1
,2
]}

Chiou, Yih-Peng ^{[1
,3
]}

Wu, Tzong-Lin ^{[1
,2
]}

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan

[2] Natl Taiwan Univ, Grad Inst Commun Engn, Taipei 10617, Taiwan

[3] Natl Taiwan Univ, Grad Inst Photon & Optoelect, Taipei 10617, Taiwan

来源：

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | 2012年 / 22卷 / 06期

关键词：

Conformal mapping; equivalent circuit model; 3-D integrated circuits; through-silicon via (TSV);

D O I：

10.1109/LMWC.2012.2195776

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Based on the conformal mapping technique, a novel macro-pi model is proposed to accurately predict the electrical performance of a low pitch-to-diameter ratio (P/D) through-silicon via (TSV) pair on the 3-D IC. The model combines the conventional resistance and inductance (RL) circuit with several parallel capacitances and conductance (CG) circuit. The accuracy-improved CG model rigorously considers the proximity effect. The model can be established by using the derived closed-form formula that is related to geometrical parameters of the TSVs. Compared with the conventional pi-type model, the proposed model can significantly reduce the error of CG value from 25% to 2% with respect to a full-wave simulation, and thus the insertion loss can be well predicted from dc to 40 GHz.

引用

页码：303 / 305

页数：3

共 7 条

[1] An analytical fringe capacitance model for interconnects using conformal mapping [J].

Bansal, Aditya ;

Paul, Bipul C. ;

Roy, Kaushik .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2006, 25 (12) :2765-2774

[2]

Churchill R. W., 1984, COMPLEX VARIABLE APP, P329

[3] Compact Wideband Equivalent-Circuit Model for Electrical Modeling of Through-Silicon Via [J].

Liu, En-Xiao ;

Li, Er-Ping ;

Ewe, Wei-Bin ;

Lee, Hui Min ;

Lim, Teck Guan ;

Gao, Shan .

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2011, 59 (06) :1454-1460

[4] Slow Wave and Dielectric Quasi-TEM Modes of Metal-Insulator-Semiconductor (MIS) Structure Through Silicon Via (TSV) in Signal Propagation and Power Delivery in 3D Chip Package [J].

Pak, Jun So ;

Cho, Jonghyun ;

Kim, Joohee ;

Lee, Junho ;

Lee, Hyungdong ;

Park, Kunwoo ;

Kim, Joungho .

2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, :667-672

[5] CHARACTERIZATION OF VIA CONNECTIONS IN SILICON CIRCUIT BOARDS [J].

QUINE, JP ;

WEBSTER, HF ;

GLASCOCK, HH ;

CARLSON, RO .

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1988, 36 (01) :21-27

[6]

Ryu C, 2006, ESTC 2006: 1ST ELECTRONICS SYSTEMINTEGRATION TECHNOLOGY CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, P215

[7] Compact AC Modeling and Performance Analysis of Through-Silicon Vias in 3-D ICs [J].

Xu, Chuan ;

Li, Hong ;

Suaya, Roberto ;

Banerjee, Kaustav .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (12) :3405-3417

← 1 →