An active clamp circuit for voltage regulation module (VRM) applications

This paper discusses the design, fabrication, and test of a CMOS active clamp circuit. The active clamp is a linear voltage regulator, with a voltage deadband to allow for voltage ripple, that is designed to operate in parallel with a switchmode voltage regulator. Its specific function is to sink or source large transient currents to microprocessor loads, thus allowing operation with very small output capacitance. Laboratory tests on a prototype IC exhibit stable behavior with negligible overshoot with only 47 microfarads of output capacitance with loads of about nine amperes. Output impedances of 2-3 m Omega are achieved.