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Capacitively Coupled Hybrid Ion Gel and Carbon Nanotube Thin-Film Transistors for Low Voltage Flexible Logic Circuits
被引:43
作者:
Choi, Yongsuk
[1
]
Kang, Joohoon
[2
,4
]
Secor, Ethan B.
[2
]
Sun, Jia
[1
]
Kim, Hyoungjun
[3
,5
]
Lim, Jung Ah
[3
,5
]
Kang, Moon Sung
[6
]
Hersam, Mark C.
[2
,7
]
Cho, Jeong Ho
[1
,8
]
机构:
[1] Sungkyunkwan Univ, SKKU Adv Inst Nanotechnol SAINT, Suwon 440746, South Korea
[2] Northwestern Univ, Dept Mat Sci & Engn, Evanston, IL 60208 USA
[3] KIST, Postsilicon Semicond Res Inst, Ctr Optoelect Mat & Devices, Seoul 02792, South Korea
[4] Univ Calif Berkeley, Dept Chem, Berkeley, CA 94720 USA
[5] KUST, Dept Nanomat & Nano Sci, Daejeon 34113, South Korea
[6] Soongsil Univ, Dept Chem Engn, Seoul 156743, South Korea
[7] Northwestern Univ, Dept Chem, Dept Elect Engn & Comp Sci, Evanston, IL 60208 USA
[8] Sungkyunkwan Univ, Dept Nano Engn, Suwon 440746, South Korea
基金:
美国国家科学基金会;
新加坡国家研究基金会;
关键词:
carbon nanotubes;
flexible circuits;
ion gels;
logic gates;
polymer dielectrics;
printing;
FIELD-EFFECT TRANSISTORS;
GATE DIELECTRICS;
POLYMER;
ELECTRONICS;
PRESSURE;
GRAPHENE;
UNIFORM;
MATRIX;
D O I:
10.1002/adfm.201802610
中图分类号:
O6 [化学];
学科分类号:
0703 ;
摘要:
The lamination of a high-capacitance ion gel dielectric layer onto semiconducting carbon nanotube (CNT) thin-film transistors (TFTs) that are bottom-gated with a low-capacitance polymer dielectric layer drastically reduces the operating voltage of the devices resulting from the capacitive coupling effect between the two dielectric layers sandwiching the CNT channel. As the CNT channel has a network structure, only a compact area of ion gel is required to make the capacitive coupling effect viable, unlike the planar channels of previously reported transistors that required a substantially larger area of ion gel dielectric layer to induce the coupling effect. The capacitively coupled CNT TFTs possess superlative electrical characteristics such as high carrier mobilities (42.0 cm(2) (Vs)(-1) for holes and 59.1 cm(2) (Vs)(-1) for electrons), steep subthreshold swings (160 mV dec(-1) for holes and 100 mV dec(-1) for electrons), and low gate leakage currents (<1 nA). These devices can be further integrated to form complex logic circuits on flexible substrates with high mechanical resilience. The layered geometry of the device coupled with scalable solution-based fabrication has significant potential for large-scale flexible electronics.
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