Estimating Soft Processor Soft Error Sensitivity Through Fault Injection

被引：27

作者：

Harward, Nathan A. ^{[1
]}

Gardiner, Michael R. ^{[1
]}

Hsiao, Luke W. ^{[1
]}

Wirthlin, Michael J. ^{[1
]}

机构：

[1] Brigham Young Univ, Dept Elect & Comp Engn, NSF Ctr High Performance Reconfigurable Comp CHRE, Provo, UT 84602 USA

来源：

2015 IEEE 23RD ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM) | 2015年

基金：

美国国家科学基金会;

关键词：

D O I：

10.1109/FCCM.2015.61

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Soft processors are increasingly used on SRAM-based FPGAs for reliable computing systems. In a radiation environment like space, the configuration memory used to configure a soft processor is sensitive to single event upsets (SEUs). Tools are needed to evaluate and estimate the reliability of soft processors in these environments. Fault injection is used to evaluate the configuration memory sensitivity of soft processor designs. This paper describes our fault injection experiments and the sensitivity results on each soft processor experiment. A suite of five benchmarks were executed on the MicroBlaze soft processor to measure the sensitivity of the processor to the software being executed. In addition, several soft processors were evaluated on a Virtex-5 FPGA: MicroBlaze, LEON3, Arm Cortex-M0, OpenRISC, and PicoBlaze. For the software benchmarks, we find that the sensitivity varies as much as 54%. For simple processor configurations running the Towers of Hanoi benchmark, we measure as low as 7,116 sensitive bits for the PicoBlaze, and as high as 112,223 sensitive bits for the Cortex M0.

引用

页码：143 / 150

页数：8

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