The ambipolar transport behavior of WSe2 transistors and its analogue circuits

被引:150
作者
Wang, Zegao [1 ]
Li, Qiang [1 ,2 ]
Chen, Yuanfu [3 ]
Cui, Bianxiao [4 ]
Li, Yanrong [3 ]
Besenbacher, Flemming [1 ]
Dong, Mingdong [1 ,4 ]
机构
[1] Aarhus Univ, Interdisciplinary Nanosci Ctr iNANO, DK-8000 Aarhus C, Denmark
[2] Shandong Univ, Sch Chem & Chem Engn, Jinan 250100, Shandong, Peoples R China
[3] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Sichuan, Peoples R China
[4] Stanford Univ, Dept Chem, Stanford, CA 94305 USA
基金
欧盟地平线“2020”; 新加坡国家研究基金会; 国家高技术研究发展计划(863计划); 中国国家自然科学基金;
关键词
FIELD-EFFECT TRANSISTORS; DOPED GRAPHENE; N-TYPE; METAL CONTACTS; LAYER; TRANSITION; VALLEY; MOS2; SPIN; BARRIER;
D O I
10.1038/s41427-018-0062-1
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Tungsten diselenide (WSe2) has many excellent properties and provides superb potential in applications of valley-based electronics, spin-electronics, and optoelectronics. To facilitate the digital and analog application of WSe2 in CMOS, it is essential to understand the underlying ambipolar hole and electron transport behavior. Herein, the electric field screening of WSe2 with a thickness range of 1-40 layers is systemically studied by electrostatic force microscopy in combination with non-linear Thomas-Fermi theory to interpret the experimental results. The ambipolar transport behavior of 1-40 layers of WSe2 transistors is systematically investigated with varied temperature from 300 to 5 K. The thickness-dependent transport properties (carrier mobility and Schottky barrier) are discussed. Furthermore, the surface potential of WSe2 as a function of gate voltage is performed under Kelvin probe force microscopy to directly investigate its ambipolar behavior. The results show that the Fermi level will upshift by 100 meV when WSe2 transmits from an insulator to an n-type semiconductor and downshift by 340 meV when WSe2 transmits from an insulator to a p-type semiconductor. Finally, the ambipolar WSe2 transistor-based analog circuit exhibits phase-control by gate voltage in an analog inverter, which demonstrates practical application in 2D communication electronics.
引用
收藏
页码:703 / 712
页数:10
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