A survey on fault injection methods of digital integrated circuits

被引：33
作者：
Eslami, Mohammad [1 ]
Ghavami, Behnam [1 ]
Raji, Mohsen [2 ]
Mahani, Ali [1 ]
机构：
[1] Shahid Bahonar Univ Kerman, Dept Engn, Kerman 7345199665, Iran
[2] Shiraz Univ, Sch Elect & Comp Engn, Shiraz 7134851154, Iran
来源：
INTEGRATION-THE VLSI JOURNAL | 2020年 / 71卷
关键词：
Reliability assessment; Fault simulation; Fault injection; Digital circuits; SOFT ERROR RATE; SER ESTIMATION; SINGLE; OPTIMIZATION; RELIABILITY; EMULATION; MASKING; DEVICES; DESIGN; IMPACT;
D O I：
10.1016/j.vlsi.2019.11.006
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
One of the most popular methods for reliability assessment of digital circuits is Fault Injection (Fl) in which the behavior of the circuit is simulated in presence of faults. In this paper, we present a survey of FI techniques as well as classifying these techniques considering different aspects and criteria to bring out their similarities and differences. The goal of this paper is to help the researchers and reliable circuit designers in gaining insights into the state-of-art in FI techniques and motivate them to further improve these techniques for more efficient reliability evaluation of digital circuit designs of tomorrow.
引用
收藏
页码：154 / 163
页数：10
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