Semiconductor-On-Insulator Lateral Bipolar Transistors for High-Speed Low-Power Applications

被引：0

作者：

Yau, Jeng-Bang ^{[1
]}

Cai, J. ^{[1
]}

Ning, T. H. ^{[1
]}

Chan, K. K. ^{[1
]}

机构：

[1] IBM TJ Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

2017 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA) | 2017年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present the first comprehensive study of symmetric lateral bipolar transistors built on Semiconductor-On-Insulator (S-OI) wafers with CMOS-like process. Record-high I-C > 3 mA/mu m is demonstrated. Reduced voltage operation can be achieved with small-bandgap semiconductor materials such as SiGe and Ge. Base current analysis and emitter engineering provide understanding of device physics and pathways to performance optimization. Simulation studies suggest f(max) > 1 THz is achievable, and BVCEO can be greatly increased in a stacked configuration.

引用

页数：2

共 5 条

[1]

Cai J., 2013, 2013 IEEE S3S, P1, DOI [10.1109/S3S.2013.6716518, DOI 10.1109/S3S.2013.6716518]

[2] A Perspective on SOI Symmetric Lateral Bipolar Transistors for Ultra-Low-Power Systems [J].

Ning, Tak H. .

IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2016, 4 (05) :227-235

[3]

Yau J.-B., 2016, IEEE BCTM

[4]

Yau J.-B., 2015, IEEE S3S C

[5] On the Base Current Components in SOI Symmetric Lateral Bipolar Transistors [J].

Yau, Jeng-Bang ;

Cai, Jin ;

Ning, Tak H. .

IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2016, 4 (03) :116-123

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