Reasoning about memory layouts

被引:1
作者
Gast, Holger [1 ]
机构
[1] Univ Tubingen, Wilhelm Schickard Inst Informat, D-7400 Tubingen, Germany
关键词
C verification; Low-level memory models; Pointer programs; Schorr-Waite graph traversal; GARBAGE COLLECTORS; DYNAMIC FRAMES; VERIFICATION; PROGRAMS; LOGIC;
D O I
10.1007/s10703-010-0098-5
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Verification methods for memory-manipulating C programs need to address not only well-typed programs that respect invariants such as the split-heap memory model, but also programs that access through pointers arbitrary memory objects such as local variables, single struct fields, or array slices. We present a logic for memory layouts that covers these applications and show how proof obligations arising during the verification can be discharged automatically using the layouts. The framework developed in this way is also suitable for reasoning about data structures manipulated by algorithms, which we demonstrate by verifying the Schorr-Waite graph marking algorithm.
引用
收藏
页码:141 / 170
页数:30
相关论文
共 40 条
[1]  
[Anonymous], P 17 ANN IEEE S LOG
[2]  
[Anonymous], 1994, LECT NOTES COMPUTER, DOI DOI 10.1007/BFB0030556
[3]  
Austern MatthewH., 1998, Generic programming and the STL: Using and extending the C++ Standard Template Library
[4]  
Banerjee A, 2008, LECT NOTES COMPUT SC, V5295, P177, DOI 10.1007/978-3-540-87873-5_16
[5]  
BERDINE J, 2007, LNCS, P4590
[6]  
Berdine J, 2006, LECT NOTES COMPUT SC, V4111, P115
[7]  
BORNAT R, 2000, MATH PROGRAM CONSTRU
[8]  
BOTINCAN M, 2009, ELECT NOTES THEORETI
[9]  
BUBEL R, 2007, LNCS, V4334
[10]  
Burstall R.M., 1972, Machine Intelligence, V7