On the correct extraction of interface trap density of MOS devices with high-mobility semiconductor substrates

被引：336

作者：

Martens, Koen ^{[1
,2
,4
]}

Chui, Chi On ^{[3
]}

Brammertz, Guy ^{[4
]}

De Jaeger, Brice ^{[4
]}

Kuzum, Duygu ^{[1
]}

Meuris, Marc ^{[4
]}

Heyns, Marc M. ^{[4
]}

Krishnamohan, Tejas ^{[1
,5
]}

Saraswat, Krishna ^{[1
]}

Maes, Herman E. ^{[2
,4
]}

Groeseneken, Guido ^{[2
,4
]}

机构：

[1] Stanford Univ, Palo Alto, CA 94305 USA

[2] Katholieke Univ Leuven, EAST Lab, B-3001 Louvain, Belgium

[3] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA

[4] IMEC, B-3001 Louvain, Belgium

[5] Intel Corp, Santa Clara, CA 95054 USA

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2008年 / 55卷 / 02期

关键词：

III-V; alternative substrates; conductance method; electrical characterization; Ge MOSFET; interface trap density extraction; Nicollian-Goetzberger; CAPACITORS; GERMANIUM; GAAS;

D O I：

10.1109/TED.2007.912365

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

"Conventional" techniques and related capacitance-voltage characteristic interpretation were established to evaluate interface trap density on Si substrates. We show that blindly applying these techniques on alternative substrates can lead to incorrect conclusions. It is possible to both under- and overestimate the interface trap density by more than an order of magnitude. Pitfalls jeopardizing capacitance- and conductance-voltage characteristic interpretation for alternative semiconductor MOS are elaborated. We show how the conductance method, the most reliable and widely used interface trap density extraction method for Si, can be adapted and made reliable for alternative semiconductors while maintaining its simplicity.

引用

页码：547 / 556

页数：10

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