Fabrication of a p-n Heterojunction Using Topological Insulator Bi2Te3-Si and Its Annealing Response

A junction device has been fabricated by growing p-type Bi2Te3 topological insulator (TI) film on an n-type silicon (Si) substrate using a thermal evaporation technique. Annealing using different temperatures and durations was employed to improve the quality of the film, as confirmed by microstructural study using x-ray diffraction (XRD) analysis and atomic force microscopy (AFM). The p-n diode characteristics of the junction devices were studied, and the effect of annealing investigated. An improved diode characteristic with good rectification ratio (RR) was observed for devices annealed for longer duration. Reduction in the leakage or reverse saturation current (I-R) was observed with increase in the annealing temperature. The forward-bias current (I-F) dropped in devices annealed above 400 degrees C. The best results were observed for the sample device annealed at 450 degrees C for 3h, showing figure of merit (FOM) of 0.621 with RR approximate to 504 and = 0.25 mu A. In terms of ideality factor, the sample device annealed at 550 degrees C for 2h was found to be the best with n = 6.5, RR approximate to 52.4, I-R = 0.61 mu A and FOM = 0.358. The majority-carrier density (N-A) in the p-Bi2Te3 film of the heterojunction was found to be on the order of 10(9)/cm(3) to 10(11)/cm(3), quite close to its intrinsic carrier concentration. These results are significant for fundamental understanding of device applications of TI materials as well as future applications in solar cells.