Improvement of time resolution of the double-oscillator time-to-digital converter using SFQ circuits

被引:5
|
作者
Nakamiya, K.
Nishigai, T.
Yoshikawa, N.
Fujimaki, A.
Terai, H.
Yorozu, S.
机构
[1] Yokohama Natl Univ, Dept Elect & Comp Engn, Yokohama, Kanagawa 2408501, Japan
[2] Nagoya Univ, Dept Quantum Engn, Chikusa Ku, Nagoya, Aichi 4648603, Japan
[3] NICT, Nishi Ku, Kobe, Hyogo 6512492, Japan
[4] SRL ISTEC, Tsukuba, Ibaraki 3058501, Japan
来源
关键词
SFQ circuits; superconducting devices; superconducting integrated circuits delay estimation; TDC; Josephson device measurement applications;
D O I
10.1016/j.physc.2007.04.317
中图分类号
O59 [应用物理学];
学科分类号
摘要
We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. The proposed TDC consists of two sets of ring oscillators and binary counters, and a coincidence detector (CD), which detects the coincidence of the arrival of two SFQ pulses from two ring oscillators. The advantage of the proposed TDC is its simple circuit structure with wide measurement range in addition to the high resolution and the high sensitivity of the SFQ TDC compared to semiconductor TDCs. The time resolution of the proposed TDC is limited by the resolution of the CD. In order to improve the resolution, we have developed a dynamic AND (DAND) gate, which can detect two simultaneous SFQ signal inputs with high accuracy. It was demonstrated that the time resolution of the TDC using the DAND gate is improved to be +/- 4 ps. (C) 2007 Elsevier B.V. All rights reserved.
引用
收藏
页码:1088 / 1091
页数:4
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