A simple, precise, and low jitter delay/gate generator

被引：21

作者：

Kalisz, J ^{[1
]}

Poniecki, A ^{[1
]}

Rózyc, K ^{[1
]}

机构：

[1] Mil Univ Technol, PL-00908 Warsaw, Poland

来源：

REVIEW OF SCIENTIFIC INSTRUMENTS | 2003年 / 74卷 / 07期

关键词：

D O I：

10.1063/1.1578707

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

The generator of precise delay over the range of 0-650 mus is described. The delay is selected with 10 ps resolution and its jitter is below 8 ps (rms) for delays up to 10 mus. The generator was designed as a complementary metal-oxide-semiconductor programmable logic device driven by a signal generator. Three output pulses are generated: START, STOP, and GATE, all with the amplitude of 2.3 V and the switching times below 500 ps. (C) 2003 American Institute of Physics.

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页码：3507 / 3509

页数：3

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