Carbon nanotube bumps for the flip chip packaging system

被引：23

作者：

Yap, Chin Chong ^{[1
,2
]}

Brun, Christophe ^{[1
,3
]}

Tan, Dunlin ^{[1
,2
]}

Li, Hong ^{[2
]}

Teo, Edwin Hang Tong ^{[1
,2
,4
]}

Baillargeat, Dominique ^{[1
]}

Tay, Beng Kang ^{[1
,2
]}

机构：

[1] CINTRA CNRS NTU THALES, UMI 3288, Singapore 637553, Singapore

[2] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore, Singapore

[3] Univ Limoges, XLIM UMR 6172, CNRS, F-87060 Limoges, France

[4] Temasek Labs NTU, Singapore 637553, Singapore

来源：

NANOSCALE RESEARCH LETTERS | 2012年 / 7卷

关键词：

CNT bumps; interconnects; flip chip; packaging; GROWTH-PROCESS;

D O I：

10.1186/1556-276X-7-105

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

Carbon nanotube [CNT] interconnection bump joining methodology has been successfully demonstrated using flip chip test structures with bump pitches smaller than 150 mu m. In this study, plasma-enhanced chemical vapor deposition approach is used to grow the CNT bumps onto the Au metallization lines. The CNT bumps on the die substrate are then 'inserted' into the CNT bumps on the carrier substrate to form the electrical connections (interconnection bumps) between each other. The mechanical strength and the concept of reworkable capabilities of the CNT interconnection bumps are investigated. Preliminary electrical characteristics show a linear relationship between current and voltage, suggesting that ohmic contacts are attained.

引用

页码：1 / 8

页数：8

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