Analog integrated circuit demonstrator for electronic engineering education - An educational demonstrator for the analysis of analog CMOS circuits

被引：0

作者：

Farres, E ^{[1
]}

Serra-Graells, F ^{[1
]}

Uranga, A ^{[1
]}

Barniol, N ^{[1
]}

机构：

[1] Inst Microelect Barcelona, CNM, Bellaterra, Spain

来源：

MICROELECTRONICS EDUCATION | 1998年

关键词：

D O I：

暂无

中图分类号：

G40 [教育学];

学科分类号：

040101 ; 120403 ;

摘要：

A demonstrator through the VLSI CMOS 2.5 mu m double-poly process (CNM25) of the Centre Nacional de Microelectronica (CNM) only for teaching purposes has been implemented. This demonstrator allows not only the test using normal electronic lab instrumentation of simple analog building blocks and more complex circuits through external connections but also the simulation of these circuits with the LEVEL=2 MOSFET simulation models files provided using an Spice like simulator (for instance the evaluation kit of Pspice).

引用

页码：173 / 176

页数：4