Hardware-friendly advanced motion vector prediction method and its architecture design for high efficiency video coding

High efficiency video coding (HEVC) has been standardized as a means of meeting the coding requirements of 4 K (3840 x 2160) video. However, HEVC has a high computational complexity and a challenging hardware implementation. As a result, 4 K video applications are still limited. Consequently, the present study proposes a hardware-friendly advanced motion vector prediction (AMVP) method for HEVC which avoids the data dependency problem during the hardware pipeline operation. In the proposed method, the motion vector relationship between the largest coding unit (LCU) and the smaller coding units (CUs) and prediction units (PUs) is observed first. Based on the observation results, a linear model is constructed to estimate the motion vectors of the CUs and PUs from the motion vector of the LCU. It is shown that the proposed prediction method improves the hardware coding throughput by at least 53.8% compared to a traditional AMVP hardware realization, and increases the BD-rate by no more than 0.99% on average. To reduce the hardware implementation costs, a coefficient approximation and control signal sharing technique are also proposed in this paper to realize the proposed linear model. In addition, since the motion vectors of the small CUs and PUs are estimated in advance, a data pre-fetch technique can be employed to further increase the hardware-coding throughput. The experimental results show that the proposed AMVP design has a gate count of just 10 k.