Consideration of linearity in cascode low noise amplifiers using double derivative superposition method with a tuned inductor

In this paper, we propose a highly linear low noise amplifier (LNA) using the double derivative superposition method with a tuned inductor. This topology has an auxiliary common gate stage of the cascode amplifier to cancel each third order intermodulation distortion (IMD3) component and can provide a high third order input intercept point (IIP3) for the 5.25 GHz frequency band. From the simulation results using the TSMC 0.18 mu m RF CMOS process, the IIP3 in the proposed cascode LNAs can be improved by 9 dB, compared with the conventional derivative superposition method. The proposed low noise amplifier achieves an IIP3 of +15 dBm with a gain of 10.5 dB, a noise figure (NF) of 2.4 dB, and a power consumption of 6 mA at 1.5 V.