A novel phase compensation technique for integrated feedback integrators

被引：0

作者：

Matsumoto, F ^{[1
]}

Noguchi, Y ^{[1
]}

机构：

[1] Natl Def Acad, Dept Appl Phys, Yokosuka, Kanagawa 2398686, Japan

来源：

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES | 1998年 / E81A卷 / 06期

关键词：

analog integrated circuits; integrators; excess phase shift; phase compensation;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A novel phase compensation technique for feedback integrators is proposed. By the technique, a zero is obtained without employing extra capacitors. A design of an integrator For IC using the proposed technique is presented. The frequency of the parasitic pole is proportional to the unity gain frequency. II is shown that excess-phase cancellation is obtained at any unity gain Frequency.

引用

页码：1168 / 1171

页数：4

共 5 条

[1] ISHIBASHI Y, 1992, IEICE T FUND ELECTR, VE75A, P1777
[2] Matsumoto F, 1996, IEICE T FUND ELECTR, VE79A, P158
[3] Matsumoto F., 1997, Transactions of the Institute of Electrical Engineers of Japan, Part C, V117-C, P1021
[4] A BICMOS LOW-DISTORTION 8-MHZ LOW-PASS FILTER
WILLINGHAM, SD
MARTIN, KW
GANESAN, A
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1993, 28 (12) : 1234 - 1245
[5] DESIGN OF A 2.7-GHZ LINEAR OTA AND A 250-MHZ ELLIPTIC FILTER IN BIPOLAR TRANSISTOR-ARRAY TECHNOLOGY
WYSZYNSKI, A
SCHAUMANN, R
SZCZEPANSKI, S
VANHALEN, P
[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1993, 40 (01): : 19 - 31

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