Compact Modeling of III-V/Si FETs

被引:0
作者
Zhou, Xing [1 ]
Ben Chiah, Siau [1 ]
Syamal, Binit [1 ]
Ajaykumar, Arjun [1 ]
Liu, Xu [1 ]
Zhou, Hongtao [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, 50 Nanyang Ave, Singapore 639798, Singapore
来源
2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT) | 2014年
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
With conventional Si and emerging III-V devices being co-integrated in a hybrid integrated circuit, a unified compact model with 3-D electrostatics and quantum as well as quasi-ballistic effects is highly demanded. This paper outlines challenges and prospects in the field of compact modeling for future generation heterogeneous integrated systems. Through examples of ongoing developments, we show approaches in unifying compact models for conventional Si-MOSFETs in the drift-diffusion and velocity-saturation formalism and for emerging III-V HEMTs in the quasi-ballistic/quantum formalism for future generation III-V/Si co-integrated ULSI circuit design.
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页数:4
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