Integrated predicated and speculative execution in the IMPACT EPIC architecture
被引:44
作者:
August, DI
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机构:
Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
August, DI
[1
]
Connors, DA
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Connors, DA
[1
]
Mahlke, SA
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Mahlke, SA
[1
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Sias, JW
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Sias, JW
[1
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Crozier, KM
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Crozier, KM
[1
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Cheng, BC
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Cheng, BC
[1
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Eaton, PR
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Eaton, PR
[1
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Olaniran, QB
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Olaniran, QB
[1
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Hwu, WMW
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Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USAUniv Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
Hwu, WMW
[1
]
机构:
[1] Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
来源:
25TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, PROCEEDINGS
|
1998年
关键词:
D O I:
10.1109/ISCA.1998.694777
中图分类号:
TP3 [计算技术、计算机技术];
学科分类号:
0812 ;
摘要:
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques which enable the compiler to represent control speculation, data dependence speculation, and predication have individually been shown to be very effective. However; these techniques have not been studied in combination with each other This paper presents the IMPACT EPIC Architecture to address the issues involved in designing processors based on these EPIC concepts. In particular we focus on new execution and recovery models in which microarchitectural support for predicated execution is also used to enable efficient recovery from exceptions caused by speculatively executed instructions. This paper demonstrates that a coherent framework to integrate the three techniques can be elegantly designed to achieve much better performance than each individual technique could alone provide.