Methods for reducing write error rate in voltage-induced switching having prolonged tolerance of voltage-pulse duration

被引：7

作者：

Matsumoto, R. ^{[1
]}

Imamura, H. ^{[1
]}

机构：

[1] Natl Inst Adv Ind Sci & Technol, Spintron Res Ctr, Tsukuba, Ibaraki 3058568, Japan

来源：

AIP ADVANCES | 2019年 / 9卷 / 12期

关键词：

ATOMIC LAYERS;

D O I：

10.1063/1.5128154

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

Simulating the magnetization dynamics in a perpendicularly-magnetized free layer with Langevin equation, we investigated methods for reducing write error rate (WER) in voltage-induced switching with long tolerance of voltage-pulse duration (t(p)). The simulation results show that WER can be reduced by increasing the perpendicular anisotropy (K-u) before and after the application of voltage or by increasing both K-u and the in-plane external magnetic field.

引用

页数：4

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