Design automation for hybrid CMOS-nanoelectronics crossbars

被引：0

作者：

Kim, Kyosun ^{[1
]}

Karri, Ramesh ^{[2
]}

Orailoglu, Alex ^{[3
]}

机构：

[1] Univ Incheon, Dept Elect Engn, Inchon, South Korea

[2] Polytech Univ, Dept Elect & Comp Eng, Brooklyn, NY 11201 USA

[3] Univ Calif, Dept Comp Sci & Engn, San Diego, CA 92093 USA

来源：

2007 IEEE INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURE | 2007年

关键词：

CMOL FPGA; automatic layout design;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We developed the first automatic design system targeting a promising hybrid CMOS-Nanoelectronics Architecture called CMOL [5]. The CMOL architecture uses NOR gates to implement combinational logic. In this hybrid CMOS-nanoelectronics architecture, logical functions and the interconnections share the nanoelectronics hardware resource. Towards automating the CMOL physical design process, we developed a model for the CMOL architecture, formulated the placement and routing problems for the CMOL architecture subject to the unique CMOL specific constraints, and solved it by combining a placement algorithm with a gate assignment algorithm in a loop. We validated the proposed approach by implementing several industrial strength designs.

引用

页码：27 / +

页数：2