Void-induced thermal impedance in power semiconductor modules: Some transient temperature effects

被引：105

作者：

Katsis, DC ^{[1
]}

van Wyk, JD ^{[1
]}

机构：

[1] Virginia Polytech Inst & State Univ, Ctr Power Elect Syst, Bradley Dept Elect & Comp Engn, Blacksburg, VA 24061 USA

来源：

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS | 2003年 / 39卷 / 05期

关键词：

die-attach; power MOSFET; thermal impedance; thermal resistance;

D O I：

10.1109/TIA.2003.816527

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

The operation of power semiconductor modules creates thermal stresses that grow voids in the solder die-attach layer. These voids reduce the ability of the die-attach solder layer to conduct heat from the silicon junction to the heat spreader. This results in increased thermal impedance. The effect of accelerated aging on solder bond voiding and on thermal transient behavior is investigated. Commercially packaged TO-247 style MOSFETs are power cycled, imaged, and thermally analyzed to generate a correlation between void percentage and thermal impedance.

引用

页码：1239 / 1246

页数：8

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