Fabrication Method of Sub-100 nm Metal-Oxide-Semiconductor Field-Effect Transistor with Thick Gate Oxide

被引：5

作者：

Singh, Vipul ^{[1
]}

Inokawa, Hiroshi ^{[1
]}

Endoh, Tetsuo ^{[2
]}

Satoh, Hiroaki ^{[1
]}

机构：

[1] Shizuoka Univ, Elect Res Inst, Hamamatsu, Shizuoka 4328011, Japan

[2] Tohoku Univ, Interdisciplinary Res Ctr, Sendai, Miyagi 9808578, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2010年 / 49卷 / 12期

关键词：

MOSFET;

D O I：

10.1143/JJAP.49.128002

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Based on the standard large-scale integrated circuit (LSI) process, sub-100 nm gate metal-oxide-semiconductor field-effect transistor (MOSFET) with thick gate oxide was fabricated. This was realized only by the modification of layout design, and no customization of the fabrication process was necessary. This unique designing technique is of great use in obtaining low-input-leakage MOSFET by advanced LSI process for high-performance analog applications. (C) 2010 The Japan Society of Applied Physics

引用

页数：2

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