Single n-InAs nanowire MIS-Field-Effect transistor: Experimental and simulation results

被引:2
作者
Do, Q. T. [1 ]
Blekker, K. [1 ]
Regolin, I. [1 ]
Prost, W. [1 ]
Tegude, F. -J. [1 ]
机构
[1] Univ Duisburg Essen, Dept Solid State Elect, Lotharstr 55, D-47057 Duisburg, Germany
来源
2007 INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALS, CONFERENCE PROCEEDINGS | 2007年
关键词
D O I
10.1109/ICIPRM.2007.381206
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We fabricated and characterised n-InAs nanowire field effect transistors. Nanowires were grown by metal-organic vapour-phase epitaxy (MOVPE) using the vapour-liquid-solid (VLS) growth mode. Metal-insulator field-effect transistors are fabricated using single n-InAs nanowire with a diameter of d = 50 nm as a channel and a silicon nitride gate dielectric. The gate length and gate dielectric variation are experimentally studied by means of DC output- and transfer-characteristics and is modeled using the long-channel MOSFET equations. The device properties are studied for an insulating layer thickness from 20 nm to 90 nm while the gate length is varied from 1 mu m to 5 mu m. The InAs nanowire field-effect transistors exhibit an excellent saturation behavior and breakdown voltage values Of V-BR > 3 V. The channel current divided by the diameter d of a nanowire reaches 3 A/mm. A maximum normalized transconductance g(m)/d > 2 S/mm at room temperature is routinely measured for devices with a gate length :S 2 mu m and a gate dielectric layer thickness <= 30 nm. Based on Iniguez's continuous charge control model for surrounding-gate MOSFET, the device is modelled and compared to experimental data. The good agreement verifies the validity of the model and provides detailed information on transport parameters available in InAs NW.
引用
收藏
页码:392 / 395
页数:4
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