HARDWARE-SOFTWARE CODESIGN OF HISTOGRAM OF ORIENTED GRADIENTS ON HETEROGENEOUS COMPUTING PLATFORM

被引:0
作者
Wang, Yuan-Kai [1 ,2 ]
Chen, Hung-Yu [2 ]
Chen, Kuan-Yu [1 ]
Huang, Shih-Yu [3 ]
机构
[1] Fu Jen Catholic Univ, Dept Elect Engn, New Taipei City, Taiwan
[2] Fu Jen Catholic Univ, Grad Inst Appl Sci & Engn, New Taipei City, Taiwan
[3] Ming Chuan Univ, Dept Informat & Commun Engn, Taipei, Taiwan
来源
PROCEEDINGS OF 2019 INTERNATIONAL CONFERENCE ON MACHINE LEARNING AND CYBERNETICS (ICMLC) | 2019年
关键词
Histogram of oriented gradients; Heterogeneous computing; Hardware acceleration; Zynq; FPGA;
D O I
10.1109/icmlc48188.2019.8949276
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Histogram of oriented gradients (HOG) is a highly important feature representation in computer vision for many applications such as objection detection. The HOG computes local histograms of oriented gradients of pixel luminance on a dense grid of uniformly spaced cells and normalized to be a feature vector. Its computational complexity is high, and its implementation on edge computing and embedded devices is challenging. This paper proposes a hardware software codesign strategy to redesign the HOG algorithm. Pipelining and hardware acceleration by FPGA are applied in the design to the performance improvement of HOG. The design is implemented on a heterogeneous computing platform and with high level synthesis techniques exploiting C-code to accelerate the design of hardware circuits. Our results of full HD images achieve 500 times speed-up compared with software implementation.
引用
收藏
页码:107 / 113
页数:7
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