Fault-Tolerant Routing in Networks-on-Chip Using Self-Organizing Routing Algorithms

被引:13
作者
Romanov, Aleksandr [1 ]
Myachin, Nikolay [1 ]
Sukhov, Andrei [1 ]
机构
[1] HSE Univ, Moscow, Russia
来源
IECON 2021 - 47TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY | 2021年
关键词
self-organizing routing in networks-on-chip; virtual coordinate method; hierarchical routing method; greedy forwarding method; SYSTEM;
D O I
10.1109/IECON48115.2021.9589829
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This work focuses on using self-organizing algorithms employed in the field of wireless sensor networks to networks-on-chip (NoCs) and presents a method for choosing hierarchical coordinates and a greedy forwarding algorithm for path finding. The features of algorithm functioning in the conditions of an overloaded NoC and the presence of fault nodes are considered, and a set of rules for bypassing blocked network sections is given. The proposed hierarchical coordinate method and a greedy forwarding fault tolerant routing algorithm are universal and suit for any NoC topology. To test the proposed solutions in NoCs with more than 300 nodes and mesh topology a special software simulator was developed, which confirmed the efficiency and stability of routing algorithms and coordinate assignment. Dependence of lengthening of the route and increase in the number of unreachable nodes on the number of disabled nodes (when using the routing algorithm proposed) was also investigated. It was shown that the proposed routing algorithm significantly exceeded fault tolerant algorithms and was only slightly inferior to the optimal algorithm (Dijkstra's algorithm) in the capability of constructing a route for the movement of packets through the network under nodes failures conditions.
引用
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页数:6
相关论文
共 24 条
[1]  
Amadeo M, 2020, IEEE CONF COMPUT, P610, DOI 10.1109/INFOCOMWKSHPS50562.2020.9162741
[2]  
[Anonymous], 2017, ON CHIP NETWORKS
[3]  
Chaochao Feng, 2010, Proceedings 2010 IEEE International SOC Conference (SOCC 2010), P441, DOI 10.1109/SOCC.2010.5784672
[4]  
Chen Y, 2018, IEEE CONF COMPUT, P651
[5]   Formal Modeling of Network-on-Chip Using CFSM and its Application in Detecting Deadlock [J].
Das, Surajit ;
Karfa, Chandan ;
Biswas, Santosh .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2020, 28 (04) :1016-1029
[6]   Fuzzy Dijkstra algorithm for shortest path problem under uncertain environment [J].
Deng, Yong ;
Chen, Yuxin ;
Zhang, Yajuan ;
Mahadevan, Sankaran .
APPLIED SOFT COMPUTING, 2012, 12 (03) :1231-1237
[7]   Path-Based Partitioning Methods for 3D Networks-on-Chip with Minimal Adaptive Routing [J].
Ebrahimi, Masoumeh ;
Daneshtalab, Masoud ;
Liljeberg, Pasi ;
Plosila, Juha ;
Flich, Jose ;
Tenhunen, Hannu .
IEEE TRANSACTIONS ON COMPUTERS, 2014, 63 (03) :718-733
[8]   NoC routing protocols - objective-based classification [J].
Gabis, Asma Benmessaoud ;
Koudil, Mouloud .
JOURNAL OF SYSTEMS ARCHITECTURE, 2016, 66-67 :14-32
[9]   THE TURN MODEL FOR ADAPTIVE ROUTING [J].
GLASS, CJ ;
NI, LM .
JOURNAL OF THE ACM, 1994, 41 (05) :874-902
[10]   Energy-aware mapping for tile-based NoC architectures under performance constraints [J].
Hu, JC ;
Marculescu, R .
ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2003, :233-239