Study of charge trapping/detrapping mechanism in SiO2/HfO2 stack gate dielectrics considering two-way detrapping

被引：1

作者：

Shahil, K. M. Farhan ^{[1
]}

Arafat, Md. Nayeem ^{[1
]}

Kbosru, Q. D. M. ^{[1
]}

Khan, M. Rezwan ^{[2
]}

机构：

[1] Bangladesh Univ Engn & Technol, Dept Elect & Elect Engn, Dhaka 1000, Bangladesh

[2] United Int Univ, Dept Elect & Elect Engn, Dhaka 1209, Bangladesh

来源：

2007 INTERNATIONAL WORKSHOP ON ELECTRON DEVICES AND SEMICONDUCTOR TECHNOLOGY | 2007年

关键词：

charge trapping; EOT; high-k dielectrics; one-way detrapping; two-way detrapping;

D O I：

10.1109/EDST.2007.4289792

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A theoretical model for analyzing the threshold voltage instability induced by charge trapping in the MOSFETs using high-k gate dielectric stacks has been developed. The focus of this work is to investigate the role of detrapped electrons to the gate, which has been taken as negligible before. A predominant role of that effect has been observed with decreasing effective oxide thickness. It has also been found that, this effect becomes non-trivial with higher trapping time.

引用

页码：117 / +

页数：2

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