Cache-Conscious Data Placement

被引:41
作者
Calder, B [1 ]
Krintz, C
John, S
Austin, T
机构
[1] Univ Calif San Diego, Dept Comp Sci & Engn, San Diego, CA 92103 USA
[2] Intel Corp, Microcomp Res Labs, Santa Clara, CA 95051 USA
关键词
D O I
10.1145/291006.291036
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been leed to improve instruction cache performance by mapping code with temporal locality to different cache blocks in the virtual address space eliminating cache conflicts. These code placement techniques can be applied directly to the problem of placing data for improved data cache performance. In this paper we present a general framework for Cache Conscious Data Placement. This is a compiler directed approach that creates an address placement for the stack (local variables), global variables, heap objects, and constants in order to reduce data cache misses. The placement of data objects is guided by a temporal relationship graph between objects generated via profiling. Our results show that profile driven data placement significantly reduces the data miss rare by 24% on average.
引用
收藏
页码:139 / 149
页数:11
相关论文
共 34 条
  • [1] AGARWAL A, 1993, P 20 ANN INT S COMP, V21, P179
  • [2] AUSTIN TM, 1996, 1311 TR UW MAD COMP
  • [3] BARRETT DA, 1993, P ACM SIGPLAN 93 C P, V28, P187
  • [4] CARR S, 1994, P 6 INT C ARCH SUPP, V28, P252
  • [5] CHEN CL, 1989, P 16 ANN INT S COMP, V17, P387
  • [6] CHILIMBI T, 1998, UNPUB IMPROVING POIN
  • [7] CHILIMBI T, 1998, UNPUB USING GENERATI
  • [8] DAHLGREN F, 1991, P 24 ANN INT S MICR, V22, P189
  • [9] FARKAS KI, 1994, P 21 ANN INT S COMP, V22, P211
  • [10] GAO QS, 1993, P 20 ANN INT S COMP, V21, P337