A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "slew boost" technique

被引：0

作者：

Aslanzadeh, HA ^{[1
]}

Mehrmanesh, S ^{[1
]}

Vahidfar, MB ^{[1
]}

Safarian, AQ ^{[1
]}

Lotfi, R ^{[1
]}

机构：

[1] Sharif Univ Technol, Tehran, Iran

来源：

ISLPED'03: PROCEEDINGS OF THE 2003 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN | 2003年

关键词：

CMOS analog circuit; operational amplifier; pipelined analog to digital converter; ultra low voltage; low power; high speed; class AB; slew boost technique;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

An ultra-low-voltage low-power high-speed class-AB operational amplifier with a new structure is presented. A new technique called "Slew Boost" is introduced to improve amplifier's large-signal settling behavior, most useful in switched-capacitor circuits such as pipelined ADCs, sigma delta modulators, etc. The proposed op-amp has been designed to be employed in the first stage of a 10bit 150MSamples/sec pipelined analog-to-digital converter. Simulation results of the proposed fully-differential class-AB op-amp using 0.18um CMOS process models, confirm that it has an output swing of 1.5 Vp-p and consumes less than 1mW from a single supply of 1 volt.

引用

页码：340 / 344

页数：5

共 50 条

[31] Design Optimization of High-Speed and Low-Power Operational Transconductance Amplifier Using gm/ID Lookup Table Methodology
Konishi, Takayuki
Inazu, Kenji
Lee, Jun Gyu
Natsui, Masanori
Masui, Shoichi
Murmann, Boris
IEICE TRANSACTIONS ON ELECTRONICS, 2011, E94C (03): : 334 - 345
[32] A 1-V CMOS Receiver Front-End for High-Speed SI-POF Links
Gimeno, C.
Aldea, C.
Celma, S.
Aznar, F.
Azcona, C.
2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012, : 1732 - 1735
[33] A low-power high-speed 1-mb CMOS SRAM
Tan, SH
Loh, PY
Sulaiman, MS
DELTA 2006: THIRD IEEE INTERNATIONAL WORKSHOP ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, 2006, : 281 - +
[34] A Low-Power, High-Speed CMOS/CML 16:1 Serializer
Fabian Tondo, Diego
Rogelio Lopez, Ramiro
2009 ARGENTINE SCHOOL OF MICRO-NANOELECTRONICS, TECHNOLOGY AND APPLICATIONS (EAMTA 2009), 2009, : 81 - 86
[35] A fast settling, high DC gain, low power OPAMP design for high resolution, high-speed, A/D converters.
Shahrjerdi, D
Hekmatshoar, B
Talaíe, M
Shoaci, O
ICM 2003: PROCEEDINGS OF THE 15TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, 2003, : 207 - 210
[36] A high-speed/low-power architecture for 1-D discrete biorthogonal wavelet transform
Uzun, IS
Amira, A
Bouridane, A
PROCEEDINGS OF THE 46TH IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS & SYSTEMS, VOLS 1-3, 2003, : 1451 - 1454
[37] High-speed and low-power analog source driver for TFT-LCD using dynamic current biased operational amplifier
Choi, Jinyong
Min, Kyungyoul
Yoo, Changsik
2007 SID INTERNATIONAL SYMPOSIUM, DIGEST OF TECHNICAL PAPERS, VOL XXXVIII, BOOKS I AND II, 2007, 38 : 1647 - 1650
[38] Efficient high-speed/low-power pipelined architecture for the direct 2-D discrete wavelet transform
Marino, F
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2000, 47 (12) : 1476 - 1491
[39] Design, package and test of ultra high-speed low power 4:1 multiplexer
Zhou, He
Feng, Jun
Guan, Xin
Zhang, Li
Li, Wei
Guan, Zhiqiang
Dongnan Daxue Xuebao (Ziran Kexue Ban)/Journal of Southeast University (Natural Science Edition), 2009, 39 (02): : 234 - 237
[40] A 4:1 multiplexer using low-power high-speed domino technique for large fan-in gates using FinFET
Garg, Sandeep
Gupta, Tarun Kumar
CIRCUIT WORLD, 2021, 47 (04) : 301 - 324

← 1 2 3 4 5 →