Static and Dynamic Modeling of Single-Electron Memory for Circuit Simulation

被引:1
作者
Xuan, Wei [1 ]
Beaumont, Arnaud [1 ]
Guilmain, Marc [2 ]
Bounouar, Mohamed-Amine [1 ,2 ]
Baboux, Nicolas [1 ]
Etzkorn, James [1 ]
Drouin, Dominique [2 ]
Calmon, Francis [1 ]
机构
[1] Univ Lyon, Lyon Inst Nanotechnol, INSA Lyon, F-69621 Villeurbanne, France
[2] Univ Sherbrooke, Dept Elect & Comp Engn, Sherbrooke, PQ J1K 2R1, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
Coulomb blockade; modeling; single-electron devices (SEDs); single-electron memory (SEM); Verilog-A; ROOM-TEMPERATURE; TRANSISTORS; DEVICES;
D O I
10.1109/TED.2011.2173347
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Two compact models for single-electron memory (SEM) are proposed and validated by comparisons with the program SIMON. The approach is based on the master equation method and the orthodox theory. The specific and efficient algorithms for each model are presented. The first model is static and allows directly calculating the final number of electrons on the memory dot. The second model is dynamic, which evaluates every electron tunnel event to assess the stored charge variation and determines the writing or retention times. Both static and dynamic models are written in Verilog-A language and implemented in IC design framework. These SEM models are attractive for circuit simulation to find out the optimal biasing strategy and memory architecture.
引用
收藏
页码:212 / 220
页数:9
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