A Hardware/Software Prototype of EEG-based BCI System for Home Device Control

被引:28
作者
Belwafi, Kais [1 ,2 ]
Ghaffari, Fakhreddine [1 ]
Djemal, Ridha [3 ]
Romain, Olivier [1 ]
机构
[1] Univ Cergy Pontoise, CNRS UMR8051, ETIS, ENSEA, 6 Ave Ponceau, F-95014 Cergy Pontoise, France
[2] Univ Sousse, ENISo Sousse, Erriyadh 4023, Sousse, Tunisia
[3] King Saud Univ, Elect Engn Dept, Box 800, Riyadh 11421, Saudi Arabia
来源
JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | 2017年 / 89卷 / 02期
关键词
System on chip; Real-time system; Brain computer interface (BCI); ElectroEncephaloGram (EEG); Motor imagery; EEG filter optimization; Home device control; SPATIAL-PATTERNS; COMPUTER; CLASSIFICATION; DESIGN;
D O I
10.1007/s11265-016-1192-8
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a design exploration of a new EEG-based embedded system for home devices control. Two main issues are addressed in this work: the first one consists of an adaptive filter design to increase the classification accuracy for motor imagery. The second issue deals with the design of an efficient hardware/software embedded architeclture integrating the entire EEG signal processing chain. In this embedded system organization, the pre-processing techniques, which are time consuming, are integrated as hardware accelerators. The remaining blocks (Intellectual Properties - IP) are developed as embedded-software running on an embedded soft-core processor. The pre-processing step is designed to be self-adjusted according to the intrinsic characteristics of each subject. The feature extraction process uses the Common Spatial Pattern (CSP) as a filter due to its effectiveness to extract the ERD/ERS (Event-Related Desynchronization/Synchronization) effect, where the classifier is based on the Mahalanobis distance. The advantage of the proposed system lies in its simplicity and short processing time while maintaining a high performance in term of classification accuracy. A prototype of the embedded system has been implemented on an Altera FPGA-based platform (Stratix-IV). It is shown that the proposed architecture can effectively extract discriminative features for motor imagery with a maximum frequency of 150 MHz. The proposed system was validated on EEG data of twelve subjects from the BCI competition data sets. The prototype performs a fast classification within time delay of 0.399 second per trial, an accuracy average of 94.47 %, an average transfer rate over all subjects of 20.74 bits/min. The estimated power consumption of the proposed system is around 1.067 Watt (based on an integrated tool-power analysis of Altera corporation).
引用
收藏
页码:263 / 279
页数:17
相关论文
共 48 条
[1]  
Ahmadi A., 2012, Proceedings of the 2012 Ninth International Conference on Wearable and Implantable Body Sensor Networks (BSN 2012), P40, DOI 10.1109/BSN.2012.19
[2]  
Ali MSAM, 2014, 2014 IEEE 10TH INTERNATIONAL COLLOQUIUM ON SIGNAL PROCESSING & ITS APPLICATIONS (CSPA 2014), P199, DOI 10.1109/CSPA.2014.6805747
[3]  
[Anonymous], NOISE REMOVAL EEG SI
[4]  
[Anonymous], EMBEDDED SYSTEM EEG
[5]  
[Anonymous], 2007, ADV NEURAL INFORM PR
[6]  
[Anonymous], SYSTEMS MAN CYBERN A
[7]  
[Anonymous], 2005, 5 INT WORKSH BIOS IN
[8]  
[Anonymous], FRONTIERS NEUROSCIEN
[9]  
[Anonymous], INT J BIOL MED SCI
[10]  
[Anonymous], ADAPTIVE COMPLEX WAV