Bump non-wet issue in large-die flip chip package with eutectic Sn/Pb solder bump and SOP substrate pad

被引:4
作者
Xiong, ZP [1 ]
Sze, HP [1 ]
Chua, KH [1 ]
机构
[1] Agere Syst Singapore Pte Ltd, Singapore 349278, Singapore
来源
6TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, PROCEEDINGS (EPTC 2004) | 2004年
关键词
D O I
10.1109/EPTC.2004.1396648
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper describes a study on non-wet issue encountered in flip chip assembly process of high-density flip chip ball grid array (FCBGA) packages with eutectic Sn/Pb solder interconnects. Non-wet occurrence is more obvious in large-die flip chip (die size > 16mm) with high I/O counts (> 1000). Thermal-mechanical mismatch between die and substrate shows a role in affecting soldering condition of the die solder bump and substrate SOP. Positive evaluation results, involving 1) new flux material with increased percentage of solid content or modified activator and 2) plasma treatment on substrate prior to FC assembly, indicate that a more effective approach is needed to improve bump solderability in large die flip chip devices.
引用
收藏
页码:438 / 443
页数:6
相关论文
共 6 条
[1]  
HAGEN R, 1997, RELIABLE BGA ASSEMBL, P393
[2]  
LIM S, 2003 EL PACK TECHN C, P65
[3]  
ONDA N, 1997, P SEMICON W
[4]  
STRAUSS R, 1948, SMT SOLDERING HDB
[5]  
TAKYI G, 1998 IEEE CPMT INT E, P172
[6]  
YEOH HP, 2000 EL PACK TECHN C, P33