Characterization of embedded applications for decoupled processor architecture

被引:1
作者
Djabelkhir, A [1 ]
Seznec, A [1 ]
机构
[1] Inst Rech Informat & Syst Aleatoires, F-35042 Rennes, France
来源
2003 IEEE INTERNATIONAL WORKSHOP ON WORKLOAD CHARACTERIZATION | 2003年
关键词
embedded processors; decoupled architecture; embedded benchmarks; MiBench; code regularity; workload characterization; loss of decoupling;
D O I
10.1109/WWC.2003.1249063
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Needs for performance on embedded applications will lead to the use of dynamic execution on embedded processors in the next few, years. However complete out-of-order superscalar cores are still expensive in terms of silicon area and power dissipation. In this paper we study the adequation of a more limited form of dynamic execution, namely decoupled architecture, to embedded applications. Decoupled architecture is known to work very efficiently whenever the execution does not suffer from inter-processor dependencies causing some loss of decoupling, called LOD events. In this study, we address regularity of codes in terms of the LOD events that may occur We address three aspects of regularity: control regularity, control/memory dependency, and patterns of referencing memory data. Most of the kernels in MiBench will he amenable to efficient performance on a decoupled architecture.
引用
收藏
页码:119 / 127
页数:9
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