共 15 条
[2]
ARNAL V, 2005, ECS PV ULSI PROCESS, P221
[3]
Porous dielectric Dual Damascene Patterning issues for 65nm node : Can architecture bring a solution?
[J].
PROCEEDINGS OF THE IEEE 2003 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE,
2003,
:97-99
[4]
Post-etch cleaning chemistries evaluation for low k-copper integration
[J].
ULTRA CLEAN PROCESSING OF SILICON SURFACES V,
2003, 92
:263-266
[5]
A global evaluation of stripping efficiency by TD-GCMS
[J].
MATERIALS SCIENCE AND ENGINEERING B-SOLID STATE MATERIALS FOR ADVANCED TECHNOLOGY,
2003, 102 (1-3)
:30-36
[9]
Meera K, 2006, J KOREAN PHYS SOC, V48, P1713
[10]
Impact of downstream ash plasmas on ultra low-k materials
[J].
ULTRA CLEAN PROCESSING OF SILICON SURFACES VII,
2005, 103-104
:337-340