FPGA realization of a CORDIC based FFT processor for biomedical signal processing

In this paper, the design of a CORDIC algorithm based FFT processor is presented which is primarily intended to be used in biomedical signal processing. The processor is implemented in a field programmable gate array (FPGA) that is a very cost effective option for low design cycle desktop testing, and its performance is found to be satisfactory. The choice of the CORDIC algorithm for realizing the basic butterfly operation for the FFT saves a lot of hardware compared to its counterparts employing other techniques. The address generation unit required for fetching data from and writing results into the memory in proper sequence, is also incorporated within the chip which houses the controller as well. The full design is implemented using Xilinx XC 4025 series FPGA requiring approximately 750 configurable logic blocks. (C) 2001 Elsevier Science B.V. All rights reserved.