Low power high speed switched current comparator

被引:0
作者
Sun, Y. [1 ]
Wang, Y. S. [1 ]
Lai, F. C. [1 ]
机构
[1] Harbin Inst Technol, Harbin, Peoples R China
来源
MIXDES 2007: PROCEEDINGS OF THE 14TH INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS: | 2007年
关键词
SI comparator; low power; current mode; class AB;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Current mode implementation provides an alternative to high speed data conversion systems for low voltage applications. The pursuing of speed and accuracy of data conversion makes comparator critical. This paper presents a novel switched current (SI) comparator which achieves high speed without sacrificing either accuracy or power dissipation. Employing a class AB current mirror as the input stage, the desired accuracy is attained and a dynamic class AB latched comparator is used to achieve high operation speed. Both of the input stage and the latched comparator are low power blocks and the average supply current is only 85 mu A during comparison. The proposed comparator is designed and simulated in TSMC 0.25 mu m CMOS process with 1.8V supply voltage. The proposed SI comparator achieves a current sensitivity up to 0.2 mu A and a sampling frequency up to 100MHz, with only 153 mu W of total power consumption.
引用
收藏
页码:305 / 308
页数:4
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