Electrical property of coincidence site lattice grain boundary in location-controlled Si island by excimer-laser crystallization

Two-dimensional location control of large Si grains by, so-called, mu-Czochralski process with excimer-laser crystallization enables formation of thin-film transistors inside a grain; single-grain Si TFTs. In this study, the effect was studied of remaining defects inside the location-controlled grains on the electrical performance of single-grain Si TFTs. From electron backscattering diffraction analysis, it was found that most of the defects inside the location-controlled grains are coincidence site lattice (CSL) boundary of Sigma 3, followed by Sigma 9 and Sigma 27. If such CSL boundary is parallel to the current flow direction, the field effect mobility of the TFT is 597 cm(2)/Vs. When the Sigma 9 boundary is perpendicular to the current flow, the mobility decreases to 360 cm(2)/Vs, suggesting electrical activity in the Sigma 9 boundary. (C) 2005 Published by Elsevier B.V.