SOI thermal impedance extraction methodology and its significance for circuit simulation

被引:125
作者
Jin, W [1 ]
Liu, WD
Fung, SKH
Chan, PCH
Hu, CM
机构
[1] Hong Kong Univ Sci & Technol, Dept Elect & Elect Engn, Hong Kong, Hong Kong, Peoples R China
[2] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
[3] IBM Microelect, Hopewell Junction, NY 12533 USA
基金
美国国家科学基金会;
关键词
self-heating effect (SHE); SOI MOSFET; thermal impedance;
D O I
10.1109/16.915707
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The buried-oxide in SOI MOSFET inhibits heat dissipation in the Si film and leads to increase in transistor temperature. This paper reports a simple and accurate characterization method for the self-heating effect (SHE) in SOI MOSFET. The ac output conductance at a chosen bias point is measured at several frequencies to determine the thermal resistance (R-th) and thermal capacitance (C-th) associated with the SOI device. This methodology is important to remove the misleadingly large self-heating effect from the de T-V data in device modeling. Not correcting for SHE mag lead to significant error in circuit simulation. After SHE is accounted for, the frequency-dependent SHE may be disabled in circuit simulation without sacrificing the accuracy, thus providing faster circuit simulation for high-frequency circuits.
引用
收藏
页码:730 / 736
页数:7
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