A 16-bit low-power microcontroller with monolithic MEMS-LC clocking

被引：10

作者：

Marsman, ED ^{[1
]}

Senger, RM ^{[1
]}

McCorquodale, MS ^{[1
]}

机构：

[1] Univ Michigan, Ann Arbor, MI 48109 USA

来源：

2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年

关键词：

D O I：

10.1109/ISCAS.2005.1464665

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Low-power, single-chip integrated systems are prevailing in remote applications due to the increasing power and delay cost of inter-chip communication compared to on-chip computation. This paper describes the design and measured performance of a fully-functional digital core with a low-jitter, monolithic, MEMS-LC clock reference. This chip has been fabricated in TSMCs 0.18 mu m MM/RF bulk CMOS process. Maximum power consumption of the complete microsystem is 48.78mW operating at 90MHz with a 1.8V power supply.

引用

页码：624 / 627

页数：4

共 11 条

[1]

[Anonymous], IEEE 4 ANN WORKSH WO

[2]

Bellas N., 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040), P378, DOI 10.1109/ICCD.1999.808570

[3]

LEE C, 1997, MICRO 30 NOV

[4]

MARTIN S, 2003, 11 NASA S VLSI DES C, P1

[5]

MCCOORQUODALE MS, 2003, 2003 DATE DESIGNERS, P292

[6]

MCCORQUODALE M, 2003, IFIP INT C VLSI SOC

[7]

MCCORQUODALE M, 2004, THESIS U MICHIGAN

[8] A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling [J].

Nowka, KJ ;

Carpenter, GD ;

MacDonald, EW ;

Ngo, HC ;

Brock, BC ;

Ishii, KI ;

Nguyen, TY ;

Burns, JL .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2002, 37 (11) :1441-1447

[9]

RAVINDRAN R, 2005, C COD GEN OPT MAR

[10]

RAVINDRAN R, 2003, CASES OCT

← 1 2 →