A 1GHz image-rejection down-converter in 0.8μm CMOS technology

被引：18

作者：

Lee, S ^{[1
]}

Jung, K

Kim, W

Ryu, H

Song, WC

机构：

[1] Seoul Natl Univ, Sch Elect Engn, Seoul 151742, South Korea

[2] ETRI, Semicond Div, Daejeon, South Korea

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1998年 / 44卷 / 02期

关键词：

D O I：

10.1109/30.681931

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 1 GHz image-rejection down-converter implemented in 0.8 mu m CMOS process is presented. The down-converter consists of a quadrature generator and mixers. The proposed architecture has the characteristic of image-rejection insensitive to phase error of the higher frequency first local oscillator(LO). The down-converter has image-rejection characteristic of 29.3dB under 2 degrees phase error of the lower frequency second LO, The down-converter dissipates 108mW at 3.3V supply.

引用

页码：235 / 239

页数：5