The BRISC-V Platform: A Practical Teaching Approach for Computer Architecture

被引:14
作者
Agrawal, Rashmi [1 ]
Bandara, Sahan [1 ]
Ehret, Alan [1 ]
Isakov, Mihailo [1 ]
Mark, Miguel [1 ]
Kinsy, Michel A. [1 ]
机构
[1] Boston Univ, Adapt & Secure Comp Syst ASCS Lab, Boston, MA 02215 USA
来源
WCAE'19: PROCEEDINGS OF THE WORKSHOP ON COMPUTER ARCHITECTURE EDUCATION | 2019年
关键词
computer architecture; computer organization; risc-v; simulator; Verilog; generator;
D O I
10.1145/3338698.3338891
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Computer architecture lies at the intersection of electrical engineering, digital design, compiler design, programming language theory and high-performance computing. It is considered a foundational segment of an electrical and computer engineering education. RISC-V is a new and open ISA that is gaining significant traction in academia. Despite it being used extensively in research, more RISC-V-based tools need to be developed in order for RISC-V to gain greater adoption in computer organization and computer architecture classes. To that end, we present the BRISC-V Platform, a design space exploration tool which offers: (1) a web-based RISC-V simulator, which compiles C and executes assembly within the browser, and (2) a web-based generator of fully-synthesizable, highly-modular and parametrizable hardware systems with support for different types of cores, caches, and network-on-chip topologies. We illustrate how we use these tools in teaching computer organization and computer architecture classes, and describe the structure of these classes.
引用
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页数:8
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