Improved Power Rating of Cascaded H-Bridge Multilevel Inverter

被引：0
|
作者：
Ali, Asharaf [1 ]
Bhattacherjee, Haimanti [1 ]
Nakka, Jayaram [1 ]
机构：
[1] Natl Inst Technol, Dept Elect Engn, Kurukshetra, Haryana, India
来源：
2015 ANNUAL IEEE INDIA CONFERENCE (INDICON) | 2015年
关键词：
Total Harmonic Distortion (THD); Cascaded H-Bridge (CHB); Cascaded Diode Clamped Half Bridge (CDCHB); Hybrid Level-shifted and Phase-shifted (HLP); Sinusoidal Pulse Width Modulation (SPWM); SELECTIVE HARMONIC ELIMINATION; CONVERTERS; TOPOLOGIES;
D O I：
暂无
中图分类号：
TP39 [计算机的应用];
学科分类号：
081203 ; 0835 ;
摘要：
This paper presents a simulation of 5-level Cascaded Diode Clamped Half Bridge (CDCHB) Inverter using Hybrid Level-shifted and Phase-shifted (HLP) Sinusoidal Pulse Width Modulation (SPWM) technique. The output voltage, output current and voltage across each device, and the THD of the CDCHB inverter are obtained. Further, the paper aims to perform a comparison between 5-level CDCHB inverter with Cascaded H-Bridge (CHB) inverter. The comparison is done on the basis of the peak inverse voltage of each device, output power and the THD obtained with both the inverters. Simulations are done in MATLAB Simulink and results obtained are shown.
引用
收藏
页数：5
相关论文
共 50 条
  • [1] Cascaded H-bridge Multilevel Inverter for Increasing Output Voltage Levels
    Lee, June-Seok
    Sim, Hyun-Woo
    Lee, Kyo-Beum
    2014 IEEE CONFERENCE ON ENERGY CONVERSION (CENCON), 2014, : 365 - 370
  • [2] The Capacitor Voltage Balancing of Cascaded H-bridge Multilevel Inverter
    Nos, Oleg V.
    Kharitonov, Sergey A.
    Abramushkina, Ekaterina E.
    Brovanov, Sergey V.
    Smirnov, Pavel N.
    2019 IEEE INTERNATIONAL CONFERENCE ON MECHATRONICS (ICM), 2019, : 327 - 331
  • [3] Fault Diagnosis of the Newfangled Cascaded H-Bridge Multilevel Inverter
    Garapati, Durga Prasad
    Jegathesan, V
    Nalli, Praveen Kumar
    Bhukya, Ramu
    Swaroop, K. P.
    Duvvuri, S. S. S. R. Sarathbabu
    2018 8TH IEEE INDIA INTERNATIONAL CONFERENCE ON POWER ELECTRONICS (IICPE), 2018,
  • [4] Analysis of cascaded H-bridge multilevel inverter configuration with double level circuit
    Prabaharan, Natarajan
    Palanisamy, Kaliannan
    IET POWER ELECTRONICS, 2017, 10 (09) : 1023 - 1033
  • [5] Algorithm for Fault-Tolerant Operation of Cascaded H-Bridge Multilevel Inverter
    Pany, Sudipta
    Karanki, Srinivas Bhaskar
    2021 IEEE 12TH ENERGY CONVERSION CONGRESS AND EXPOSITION - ASIA (ECCE ASIA), 2021, : 926 - 931
  • [6] Optimized switching scheme of cascaded H-bridge multilevel inverter using PSO
    Gupta, Vivek Kumar
    Mahanty, R.
    INTERNATIONAL JOURNAL OF ELECTRICAL POWER & ENERGY SYSTEMS, 2015, 64 : 699 - 707
  • [7] Simulation of a Transistor Clamped H-Bridge Multilevel Inverter and its comparison with a Conventional H-Bridge Multilevel Inverter
    Anzari, M.
    Meenakshi, J.
    Sreedevi, V. T.
    2014 IEEE INTERNATIONAL CONFERENCE ON CIRCUIT, POWER AND COMPUTING TECHNOLOGIES (ICCPCT-2014), 2014, : 958 - 963
  • [8] Comparative Study Of SPWM And SVPWM Cascaded H-bridge Multilevel Inverter
    Kale, Akshay S.
    Tamhane, A., V
    Kalage, A. A.
    PROCEEDINGS OF 2017 INTERNATIONAL CONFERENCE ON INTELLIGENT COMPUTING AND CONTROL (I2C2), 2017,
  • [9] A New Cascaded H-Bridge Multilevel Inverter With Reduced Switch Count
    Mamilla, Sreenivasulu
    Anisetty, Suresh Kumar
    Pallavi, M. Rama
    PROCEEDINGS OF THE 2017 INTERNATIONAL CONFERENCE ON SMART TECHNOLOGIES FOR SMART NATION (SMARTTECHCON), 2017, : 17 - 22
  • [10] A Developed H-Bridge Cascaded Multilevel Inverter with Reduced Switch Count
    Ponraj, Ram Prakash
    Sigamani, Titus
    Subramanian, Vijayalakshmi
    JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY, 2021, 16 (03) : 1445 - 1455
12345