A 900 MHz UHF RFID reader transceiver IC

The proliferation of RFID applications motivates an integrated solution to reduce the cost and physical size of readers. This paper describes the architecture and design of a world-wide regulation-compliant single-chip RFID transceiver for multiclass tags. Based on direct-conversion architecture, this chip integrates all of the RF blocks, synthesizer, analog signal conditioning, ADC/DAC, and modulation and demodulation functions. Fabricated on a 0.18 mu m SiGe BiCMOS process, this chip occupies 21 mm(2) and produces output power of +11 dBm in linear mode and +20 dBm under supply modulation mode; the receiver has sensitivity down to -85 dBm in the presence of a 0 dBm self-jammer signal. Total power consumption is 1.2 W.