Improvement in Device Performance of Vertical Thin-Film Transistors Using Atomic Layer Deposited IGZO Channel and Polyimide Spacer

被引:55
作者
Kim, Yeo-Myeong [1 ]
Kang, Han-Byeol [1 ]
Kim, Gi-Heon [2 ]
Hwang, Chi-Sun [2 ]
Yoon, Sung-Min [1 ]
机构
[1] Kyung Hee Univ, Dept Adv Mat Engn Informat & Elect, Yongin 446701, South Korea
[2] Elect & Telecommun Res Inst, Smart IO Platform Res Dept, Daejeon 305730, South Korea
基金
新加坡国家研究基金会;
关键词
Vertical channel; oxide thin-film transistor (TFT); ALD-grown In-Ga-Zn-O (IGZO); TEMPERATURE;
D O I
10.1109/LED.2017.2736000
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Technical strategies for improving the device characteristics of the In-Ga-Zn-O (IGZO) vertical channel thin-film transistors (VTFTs) were presented and investigated. The vertical sidewall was constructed by dry-etch process and subsequently covered with IGZO, Al2O3, and AZO as active, gate insulator, and gate electrode layers by means of conformal atomic-layer-deposition. An abrupt profile and flat back-channel were achieved by employing the spin-coated polyimide (PI) spacer. The Off-current was additionally alleviated simply by cutting the area of an active layer. The fabricated IGZO VTFT using PI spacer with an "active-cut" structure exhibited an On/off ratio of 10(3), a linear mobility of 7.1 cm(2)/Vs, and a subthreshold swing of 1.2 V/decade.
引用
收藏
页码:1387 / 1389
页数:3
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