Reconfigurable chaotic pseudo random number generator based on FPGA

This paper presents an FPGA Pseudo Random Number Generator (PRNG) that is based on the Lorenz and LU chaotic systems. These two systems are used to generate four different 3D chaotic attractors. One attractor is generated from Lorenz while the other three attractors are generated from Lu. The output attractor of the proposed PRNG can be reconfigured during real time operation using an efficient hard-wired shifting and multiplexing scheme. Furthermore, in order to exploit the proposed reconfiguration feature, the proposed PRNG has been embedded in an FPGA cascaded encryption processor that ciphers the input data from one up to four times successively. In each ciphering operation the PRNG is set to a new configuration and is initialized according to a part of the encryption key. The size of the encryption key can be varied according to the number of required ciphering operations. The proposed PRNG has been realized using VHDL, synthesized on Xilinx using the FPGA device XC5VLX50T, and analyzed using MATLAB and the NIST statistical suite. The proposed PRNG has utilized only 1.4% from the FPGA's slices, achieved an operating frequency up to 78 MHz, and successfully passed all the NIST statistical tests. (C) 2018 Elsevier GmbH. All rights reserved.