Exploiting the cache capacity of a single-chip multi-core processor with execution migration

We propose to modify a conventional single-chip multi-core so that a sequential program can migrate from one core to another automatically during execution. The goal of execution migration is to take advantage of the overall on chip cache capacity. We introduce the affinity algorithm, a method for distributing cache lines automatically on several caches. We show that on working-sets exhibiting a property called "splittability", it is possible to trade cache misses for migrations. Our experimental results indicate that the proposed method has a potential for improving the performance of certain sequential programs, without degrading significantly the performance of others.