A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method

被引:0
作者
Chen, You-Rong [1 ]
Chen, Wei-Ting [2 ]
Liao, Shao-Chieh [1 ]
Chen, Pei-Yin [1 ]
Fang, Hong-Yu [2 ]
Tai, Tzu-You [3 ]
机构
[1] Natl Cheng Kung Univ, Dept Comp Sci & Informat Engn, Digital IC Design Lab, Tainan 70101, Taiwan
[2] Novatek Microelect Corp, Hsinchu 30076, Taiwan
[3] MediaTek Inc, Hsinchu 30078, Taiwan
关键词
Costs; Estimation; Hardware; Signal processing algorithms; Real-time systems; Error analysis; Field programmable gate arrays; Depth estimation; hardware implementation; high-speed; low-cost; stereo matching; STEREO VISION SYSTEM; ADAPTIVE SUPPORT;
D O I
10.1109/ACCESS.2022.3189008
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Depth estimation using stereo images can be achieved by calculating the disparity values between the left and the right images captured by two parallel cameras. Reconstructing depth information from 2D images is crucial in many applications, such as self-driving vehicles and robot navigation. Furthermore, most of these applications are employed with resource-constrained devices and have real-time requirements. In this paper, a high-speed, low-cost hardware implementation for disparity estimation is proposed. We adopted the novel disparity fusion method in our architecture, which can significantly reduce the number of calculations in the overall process. A refinement method is also designed to reduce the error rate of the resulting depth map and improve the tolerance to light noise. The proposed algorithm was implemented with the Kintex-7 field-programmable gate array. Its performance was tested by using the Middlebury-Version 2 and -Version 3 datasets. The proposed algorithm provides an operating speed of 118 fps with an error rate of only 6.36%. Compared with other state-of-the-art designs used for similar applications, the proposed method can achieve a 34.6% reduction in the error rate while providing the highest speed with competitive hardware cost.
引用
收藏
页码:72850 / 72865
页数:16
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