ASIC Implementation of Cairo University SPARC "CUSPARC" Embedded Processor

被引:3
|
作者
Suleiman, Amr A. Z. [1 ]
Khedr, Alhassan F. [1 ]
Habib, S. E. -D. [1 ]
机构
[1] Cairo Univ, Fac Engn, Elect & Commun Dept, Cairo, Egypt
关键词
D O I
10.1109/ICM.2010.5696182
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Cairo University SPARC "CUSPARC" processor is an IP embedded processor core conforming to SPARC V8 ISA. CUSPARC is fully developed at Cairo University and is the first Egyptian processor. In this paper, the ASIC Implementation and Verification of the CUSPARC processor is described at 130nm technology node. CUSPARC scores a typical clock frequency of 260MHz, power dissipation of 0.11 mW/MHz and power Efficiency of 8.78 DMIPS/mW, which makes it very suitable for embedded and real-time systems.
引用
收藏
页码:439 / 442
页数:4
相关论文
共 50 条
  • [1] Cairo University SPARC V2 (CUSPARC V2) PROCESSOR
    Habib, S. E. D.
    Ismail, Mohamed Wagih I.
    Khalil, Ahmed Ibrahim S.
    Hussein, Ezz El-Din O.
    Khedr, Alhassan F.
    Abdelfattah, Safaa A.
    Reda, Ahmed
    Elgendy, Mohamed
    2016 28TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS (ICM 2016), 2016, : 301 - 304
  • [2] FPGA and ASIC implementation of ECC processor for security on medical embedded system
    Park, J
    Hwang, JT
    Kim, YC
    Third International Conference on Information Technology and Applications, Vol 2, Proceedings, 2005, : 547 - 551
  • [3] A RISC PROCESSOR FOR EMBEDDED APPLICATIONS WITHIN AN ASIC
    ROBERTS, CE
    IEEE MICRO, 1991, 11 (05) : 20 - &
  • [4] An ASIC implementation of a low power robust invisible watermarking processor
    KarthigaiKumar, P.
    Baskaran, K.
    JOURNAL OF SYSTEMS ARCHITECTURE, 2011, 57 (04) : 404 - 411
  • [5] Design and implementation of echo instructions for an embedded processor
    Keio University, Japan
    IPSJ Trans. Syst. LSI Des. Methodol., (222-231):
  • [6] ASIC implementation of a hardware-embedded physical unclonable function
    Saqib, Fareena
    Areno, Matthew
    Aarestad, Jim
    Plusquellic, Jim
    IET COMPUTERS AND DIGITAL TECHNIQUES, 2014, 8 (06): : 288 - 299
  • [7] Implementation of Face Recognition Processing Using an Embedded Processor
    Kondo, Hiroyuki
    Nakajima, Masami
    Bober, Miroslaw
    Kucharski, Krzysztof
    Yamamoto, Osamu
    Shimizu, Toru
    JOURNAL OF ROBOTICS AND MECHATRONICS, 2005, 17 (04) : 428 - 436
  • [8] Implementation of Optical Flow Measurement System with an Embedded Processor
    Sugiki, Yukihiro
    Yamaguchi, Teruo
    Harada, Hiroshi
    2015 15TH INTERNATIONAL CONFERENCE ON CONTROL, AUTOMATION AND SYSTEMS (ICCAS), 2015, : 347 - 350
  • [9] Implementation of LCAS based on embedded-processor and FPGA
    Liu, Fu-E
    Ge, Ning
    Zhou, Zu-Cheng
    Beijing Gongye Daxue Xuebao / Journal of Beijing University of Technology, 2007, 33 (04): : 372 - 376
  • [10] Design and Physical Implementation of Array Signal Processor ASIC for Sector Imaging Systems
    Kidav, Jayaraj U.
    Sivamangai, N. M.
    Pillai, M. P.
    Sreejeesh, S. G.
    2019 32ND INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2019 18TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2019, : 448 - 453