Calibration of abstract performance models for system-level design space exploration

被引:35
作者
Pimentel, Andy D. [1 ]
Thompson, Mark [1 ]
Polstra, Simon [1 ]
Erbas, Cagkan [1 ]
机构
[1] Univ Amsterdam, Inst Informat, Comp Syst Architecture Grp, NL-1098 SJ Amsterdam, Netherlands
来源
JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | 2008年 / 50卷 / 02期
关键词
system-level modeling and simulation; performance analysis; model calibration;
D O I
10.1007/s11265-007-0085-2
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
High-level performance modeling and simulation have become a key ingredient of system-level design as they facilitate early architectural design space exploration. An important precondition for such high-level modeling and simulation methods is that they should yield trustworthy performance estimations. This requires validation ( if possible) and calibration of the simulation models, which are two aspects that have not yet been widely addressed in the system-level community. This article presents a number of mechanisms for both calibrating isolated model components as well as a system-level performance model as a whole. We discuss these model calibration mechanisms in the context of our Sesame system-level simulation framework. Two illustrative case studies will also be presented to indicate the merits of model calibration.
引用
收藏
页码:99 / 114
页数:16
相关论文
共 37 条
[1]  
[Anonymous], P 2003 ACM S APPL CO
[2]  
[Anonymous], IEEE T COMPUT AIDED
[3]   SimpleScalar: An infrastructure for computer system modeling [J].
Austin, T ;
Larson, E ;
Ernst, D .
COMPUTER, 2002, 35 (02) :59-+
[4]   Design space exploration for hardware/software codesign of multiprocessor systems [J].
Baghdadi, A ;
Zergainoh, NE ;
Cesario, W ;
Roudier, T ;
Jerraya, AA .
11TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, 2000, :8-13
[5]   Metropolis: An integrated electronic system design environment [J].
Balarin, F ;
Watanabe, Y ;
Hsieh, H ;
Lavagno, L ;
Passerone, C ;
Sangiovanni-Vincentelli, A .
COMPUTER, 2003, 36 (04) :45-+
[6]  
BALARIN F, 1997, HARDWARE SOFTWARE CO
[7]   SystemC cosimulation and emulation of multiprocessor SoC designs [J].
Benini, L ;
Bertozzi, D ;
Bruni, D ;
Drago, N ;
Fummi, F ;
Poncino, M .
COMPUTER, 2003, 36 (04) :53-+
[8]   Calibration of microprocessor performance models [J].
Black, B ;
Shen, JP .
COMPUTER, 1998, 31 (05) :59-65
[9]   COSY communication IP's [J].
Brunel, JY ;
Kruijtzer, WM ;
Kenter, HJHN ;
Pétrot, F ;
Pasquier, L ;
de Kock, EA ;
Smits, WJM .
37TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2000, 2000, :406-409
[10]   Transaction level modeling: An overview [J].
Cai, LK ;
Gajski, D .
CODES(PLUS)ISSS 2003: FIRST IEEE/ACM/IFIP INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN & SYSTEM SYNTHESIS, 2003, :19-24