Implementation of DCT using variable iterations CORDIC algorithm on FPGA

被引：0

作者：

Mane, Mansi ^{[1
]}

Patil, Dhanshree ^{[1
]}

Sutaone, Mukul S. ^{[1
]}

Sadalage, Akshay ^{[1
]}

机构：

[1] Coll Engn Pune, Dept Elect & Telecommun, Pune, Maharashtra, India

来源：

2014 First International Conference on Computational Systems and Communications (ICCSC) | 2014年

关键词：

DCT; CORDIC algorithm; FPGA;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

CORDIC or CO-ordinate Rotation DIgital Computer is a fast, simple, coherent and powerful algorithm which is used for diversified Digital Signal Processing applications. In pursuance of speed and accuracy requirements of todays applications, we put forward variable iterations CORDIC algorithm. In this algorithm, to boost speed we can lessen number of iterations in CORDIC algorithm for specific accuracy. This enhances efficiency of conventional CORDIC algorithm which we have used to compute Discrete Cosine Transform for image processing. One Dimensional Discrete Cosine Transform is implemented by using only 6 CORDIC blocks which needs only 6 multipliers. Because of the simplicity in hardware speed of image processing on FPGA is raised. Further increase in speed can be achieved by concurrently processing number of macro-blocks of an image on FPGA.

引用

页码：379 / 383

页数：5